SCR7 high-performance 64bit application core

64bit Linux-capable application core with virtual memory, MMU, L1/L2 caches, coherency and SMP support up to 8 cores per cluster

Block diagram

Key features

  • High-performance 64bit RISC-V application core
  • RV64GC ISA
  • Flexible uarch template, 10-12 stage pipeline
  • User-, Supervisor- and Machine-mode privilege levels
  • Fully-featured memory subsystem with Linux support
    • Memory Managements Unit (MMU)
    • Page-based virtual memory
    • L1 and L2 caches with coherency, HW atomics, ECC
  • High-performance IEEE 754-2008 compliant floating-point unit
  • AXI4- or ACE- compliant external interface
  • Configurable Integrated Programmable Interrupt Controller (IPIC) and PLIC
    • up to 1024 IRQs
  • Advanced Integrated Debug Controller
    • JTAG compliant interface
    • HW/SW breakpoints support
    • ROM breakpoints support

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